24 questions · about 28 minutes. Press End Mock any time to see your score and the correct answers.
Consider (146)_b + (313)_(b−2) = (246)_8. What is b?
Correct answer: B. 7
(246)₈ = 166. b² + 4b + 6 + 3(b − 2)² + (b − 2) + 3 = 4b² − 7b + 19 = 166, giving b = 7.
How many address lines and data lines are required to provide a memory capacity of 16 K × 16 ?
Correct answer: C. 14,16
16K words need 14 address lines; 16 bits per word need 16 data lines.
Suppose that a computer program takes 100 seconds of execution time on a computer with multiplication operation responsible for 80 seconds of this time. How much do you have to improve the speed of multiplication operation if you are asked to execute this program four times faster?
Correct answer: C. 16 times faster
To run in 25 s, the 20 s of non-multiply time stays, so multiplication must take 5 s instead of 80 s: 16 times faster.
A processor can support a maximum memory of (4 GB) where memory is word addressable and a word is 2 bytes. What will be the size of the address bus of the processor?
Correct answer: C. At least 31 bits
4 GB of 2-byte words = 2³¹ words, needing at least 31 address bits.
The Boolean expression Ā·B + A·B̄ + A·B is equivalent to
Correct answer: D. A + B
A·B̄ + A·B = A, so the expression is Ā·B + A = (A + Ā)(A + B) = A + B.
In computers, subtraction is generally carried out by
Correct answer: D. 2's complement
Computers subtract by adding the 2's complement of the subtrahend.
Consider the following Boolean equations:
(i) wx + w(x + y) + x(x + y) = x + wy
(ii) (w x̄ (y + x z̄) + w̄ x̄) y = x̄ y What can you say about the above equations?
Correct answer: C. Both (i) and (ii) are true
(i) wx + wx + wy + x + xy = x + wy (x absorbs wx and xy). (ii) w x̄ x z̄ = 0, so the bracket is w x̄ y + w̄ x̄; times y gives w x̄ y + w̄ x̄ y = x̄ y. Both are true.
Consider the following statements :
(i) Auto increment addressing mode is useful in creating self-relocating code.
(ii) If auto increment addressing mode is included in an instruction set architecture, then an additional ALU is required for effective address calculation.
(iii) In auto increment addressing mode, the amount of increment depends on the size of the data item accessed. Which of the above statements is/are true?
Correct answer: C. (iii) only
Self-relocating code relies on PC-relative addressing, not auto-increment (i false). The increment uses the existing address adder, not an extra ALU (ii false). The increment equals the operand size (1, 2, 4 bytes…), so (iii) is true.
A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code, a register code part to specify one of 64 registers, and an address part. How many bits are there in the operation code, the register code part and the address part?
Correct answer: A. 7,6,18
256K = 2¹⁸ words, so the address needs 18 bits; 64 registers need 6 bits; the indirect bit takes 1. Opcode = 32 − 1 − 6 − 18 = 7.
Consider the following x86 assembly language instructions: MOV AL, 153 NEG AL The contents of the destination register AL (in 8-bit binary), the status of the Carry Flag (CF) and the Sign Flag (SF) after executing these instructions are
Correct answer: D. AL = 01100111; CF = 1; SF = 0
153 = 10011001. NEG takes the 2's complement: 256 − 153 = 103 = 01100111. CF is set because the operand was non-zero, and SF = 0 because the result's MSB is 0.
Note on the official key: the official key says option A. Official key gives (A), but NEG of 10011001 is 01100111 (103), not 01100110.
The decimal floating point number -40.1 represented using IEEE-754 32-bit representation and written in hexadecimal form is
Correct answer: A. 0xC2206666
40.1 = 101000.000110011… = 1.01000000110011… × 2⁵. Sign 1, exponent 127 + 5 = 132 = 10000100, mantissa 0100 0000 1100 1100 1100 110. Bits 1100 0010 0010 0000 0110 0110 0110 0110 = 0xC2206666.
Find the boolean expression for the logic circuit shown below : (1-NAND gate, 2-NOR gate, 3-NOR gate)
Correct answer: C. AB
Gate 1 = ¬(AB). Gate 2 = NOR(Ā, B) = A·B̄. Y = NOR(¬(AB), AB̄) = AB · ¬(AB̄) = AB(Ā + B) = AB.
Consider a disk pack with 32 surfaces, 64 tracks and 512 sectors per pack. 256 bytes of data are stored in a bit serial manner in a sector. The number of bits required to specify a particular sector in the disk is
Correct answer: C. 20
Reading 512 as sectors per track: 32 surfaces (5 bits) + 64 tracks (6 bits) + 512 sectors (9 bits) = 20 bits.
Consider a system with 2 level cache. Access times of Level 1 cache, Level 2 cache and main 0.5 ns, 5 ns 100 ns memory are and respectively. The hit rates of Level 1 and Level 2 caches are 0.7 and 0.8 , respectively. What is the average access time of the system ignoring the search time within the cache?
Correct answer: B. 7.55 ns
With simultaneous lookup: 0.7 × 0.5 + 0.3 × 0.8 × 5 + 0.3 × 0.2 × 100 = 0.35 + 1.2 + 6 = 7.55 ns.
CMOS is a Computer Chip on the motherboard, which is :
Correct answer: A. RAM
The motherboard 'CMOS' stores BIOS settings and the real-time clock in low-power static RAM kept alive by a battery; the firmware itself is in a separate ROM/flash chip.
Note on the official key: the official key says option B. Official key gives (B) ROM, but the CMOS chip is a small battery-backed RAM that holds BIOS settings and the clock.
In RS flip-flop, the output of the flip-flop at the time (t+1) is the same as the output at time t, after the occurrence of a clock pulse if :
Correct answer: D. S=R=0
S = R = 0 is the hold state: Q(t+1) = Q(t).
Match the terms in List - I with the options given in List - II :
Correct answer: B. (a)-ii (b)-iii (c)-i
A decoder maps n lines to 2ⁿ (ii); a multiplexer selects 2ⁿ lines to 1 (iii); a demultiplexer routes 1 line to 2ⁿ (i).
What does the following logic diagram represent?
Correct answer: B. Ripple Counter
Both JK flip-flops toggle (J = K = 1), and the second is clocked by Q₀ rather than the common clock, so it is an asynchronous ripple counter.
The hexadecimal equivalent of the binary integer number 110101101 is :
Correct answer: D. 1 A D
Group from the right: 1 | 1010 | 1101 = 1 A D.
Perform the following operation for the binary equivalent of the decimal numbers (−14) + (−15) 10 10 The solution in 8 bit representation is :
Correct answer: A. 11100011
−14 = 11110010 and −15 = 11110001. Their sum is 11100011 (carry discarded), which is −29.
Match the items in List - I and List - II :
Correct answer: D. (a) (b) (c) (iii) (iv) (ii)
Interrupts that can be delayed are maskable (iii); unplanned interrupts during execution are exceptions (iv); interrupts in phase with the clock are synchronous (ii).
Which of the following mapping is not used for mapping process in cache memory ?
Correct answer: D. Segmented - page mapping
Cache mapping is associative, direct or set-associative; segmented paging is a virtual-memory scheme.
Simplify the following using K-map : F(A,B,C,D) = 𝛴 (0,1,2,8,9,12,13) d(A,B,C,D) = 𝛴 (10, 11,14,15) d stands for don't care condition.
Correct answer: B. A+ B'D' + B'C'
With the don't-cares, the bottom half (A = 1) forms the group A. Minterms 0, 1, 8, 9 give B′C′ and 0, 2, 8, 10 give B′D′. F = A + B′D′ + B′C′.
In 8085 microprocessor, what is the output of following program? LDA 8000 H MVI B, 30 H ADD B STA 8001H
Correct answer: C. Read a number from memory at location 8000 H and store it in memory location 8001 H
LDA 8000H loads A from memory, ADD B adds 30H, and STA 8001H stores the result. The program reads a number from 8000H and stores a result at 8001H (after adding 30H).
