Paper 2 CS · UNIT 02 · MOCK TEST

Computer System Architecture — Mock Test 1

25 questions · about 30 minutes. Press End Mock any time to see your score and the correct answers.

0 / 25 answered 00:00

Q1. Which of the following ICs has lowest power consumption?

AECL BMOS CTTL DCMOS

Q2. Consider the following binary codes:

C₁	00000
C₂	01011
C₃	10101

What is the maximum Hamming Distance value for all pairs of above mentioned codes?

A2 B3 C4 D5

Q3. The average memory access time is 130 ns and average time of cache memory is 100 ns. With 75% hit ratio, the average time to access a word is?

A130 ns B150 ns C132.5 ns D107.5 ns

Q4. Simplify the following Boolean expression using 4-variables K-map.
F(A, B, C, D) = Σ m(3, 6, 7, 11, 12, 13, 14, 15)

AA̅B + B̅C + C̅D̅ BA̅B + CD̅ + AB̅ CAB + BC + CD DCD + AC̅ + BD

Q5. Which of the following is memory interleaving?

ALayering of memory stacks one above the other BHierarchy of different type of memories CDivision of memory into multiple modules, allowing the CPU to access multiple modules simultaneously DCombining different type of memories

Q6. Arrange the following in terms of their capacity from smallest to largest:
A. L3 Cache
B. L1 Cache
C. CPU Register
D. L2 Cache
Choose the correct answer from the options given below:

AC, D, B, A BC, A, B, D CC, B, D, A DA, C, D, B

Q7. The combination of selection lines for sending the input I₁₄ to output in the following multiplexer is? (A 64×1 MUX with inputs I0...I63 and selection lines S5, S4, S3, S2, S1, S0 is shown, driving a single output.)

A001111 B110000 C111100 D001110

Q8. Match the LIST-I with LIST-II

LIST-I	LIST-II
A. FDM	I. has four possible Minterms
B. Digital Circuits	II. Frequency Division Multiplexing
C. A Two-Variable function	III. Universal flip-flop
D. J-K flip-flop	IV. Combinational or Sequential

Choose the correct answer from the options given below:

AA-II, B-I, C-IV, D-III BA-II, B-IV, C-I, D-III CA-II, B-III, C-I, D-IV DA-II, B-I, C-III, D-IV

Q9. For sending input I₆ on the output line of a 8×1 multiplexer, (an 8×1 MUX with inputs I0...I7, selection lines S2, S1, S0, driving output O/P, is shown) which of the following will represent the combination of selection lines?

A001 B100 C110 D111

Q10. The term "double buffered" is used in which of the following?

ASynchronous Communication Interface BAsynchronous Communication Interface CAddressing Mode DSerial Communication

Q11. What does "Amdahl's Law" describe in the context of parallel processing?

AMaximum speedup achievable, considering serial and parallel portions of a program BThe efficiency of message passing in a distributed memory system CComputational efficiency of a parallel algorithm DThe reliability of a fault tolerant system

Q12. The transformation of data from main memory to cache memory is referred as:

AData exchange BData transformation CMapping DMatching

Q13. Consider the Boolean expression A(x, y, z) = x(y′z)′. Which of the following is the complete sum-of-products form of the given Boolean expression?

Axyz + x′yz′ + x′y′z′ Bxyz′ + x′yz′ + x′y′z′ Cxyz′ + xy′z + x′y′z′ Dxyz + xyz′ + xy′z′

Q14. Match List I with List II

List I	List II
A. Address Space	I. Associative Mapping
B. Memory Space	II. Logical address
C. Cache Memory	III. Physical address
D. Segmented Program	IV. Virtual address

AA-IV, B-III, C-I, D-II BA-I, B-II, C-IV, D-III CA-III, B-IV, C-I, D-II DA-II, B-IV, C-I, D-III

Q15. Binary equivalent to (A0F)₁₆ is:

A111000111 B101001111 C101000001111 D111100001010

Q16. Gray code equivalent to decimal number 8 is:

A1000 B1100 C1010 D1110

Q17. The write operation in an I/O operation does the following

ATransfer data from I/O device to memory BTransfer data from memory to I/O device CTransfer data from CPU register to memory DTransfer data from CPU register to I/O device

Q18. Which of the following gates do NOT give output 1 when both the inputs are 0?
A. NAND gate
B. NOR gate
C. X-OR gate
D. X-NOR gate
Choose the correct answer from the options given below:

AA, B Only BB, C Only CC, D Only DC Only

Q19. The computer needs to process each instruction with the following sequence of steps:
A. Calculate the effective address
B. Fetch the instruction from memory
C. Decode the instruction
D. Fetch the operands from the memory
E. Execute the instruction
Choose the correct answer from the options given below:

AA, B, C, D, E BB, A, D, A, E CB, C, A, D, E DC, B, A, D, E

Q20. Which of the following statements are true?
A. In the write-through policy, only the cache is updated
B. In the write-back policy, both cache and main memory are updated
C. Cache coherence problems exist in multiprocessors with private caches because of the need to share writable data
D. Cache coherence problem can be solved by means of hardware-only scheme
Choose the correct answer from the options given below:

AA, B Only BB, C Only CC, D Only DA, B, C Only

Q21. The right sequence of a CPU program to input data will be:
A. Read status register
B. Check flag bit
C. Read data register
D. Transfer data to memory
Choose the correct answer from the options given below:

AA, B, C, D BB, A, C, D CC, B, A, D DA, C, B, D

Q22. The right sequence of suboperations that are performed in an arithmetic pipeline (floating-point addition) is
A. Align the mantissas
B. Add or subtract the mantissas
C. Normalize the result
D. Compare the exponents
Choose the correct answer from the options given below:

AD, A, B, C BD, B, A, C CB, C, A, D DB, C, D, A

Q23. Consider a pipeline unit for fixed-point multiplication of 8-bit integers. Arrange the following stages in the correct sequence.
Stage A: Consists of two CSAs and it merges four numbers from the previous stage.
Stage B: Is a CPA, which adds up the two numbers.
Stage C: Is made up of two levels of four CSAs.
Stage D: Generates eight partial products.
Choose the correct answer from the options given below:

AC, A, B, D BD, C, A, B CB, D, C, A DA, C, D, B

Q24. Which are often needed to evaluate the cache performance?

AHit Ratio BLatency CCache Traces DTransfer Rate

Q25. Arrange the following in increasing order with respect to access time.
A. Solid State Drive
B. Optical Disks
C. DRAMs
D. SRAMs
E. Registers
Choose the correct answer from the options given below:

AD, C, A, B, E BB, D, C, A, E CA, E, B, D, C DE, D, C, A, B