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Unit 2 · Computer System Architecture Paper 2 CS · June 2024 Re-Exam

Match List I (computing systems) with List II (working/output)
List IList II
(A) Half Adder(I) Has n inputs and 2ⁿ outputs
(B) Decoder(II) CPU storage unit
(C) Register(III) Used to store program at runtime
(D) Main memory(IV) 2-bit addition circuit

Pick an option to check yourself, or open the answer below.

Show answer & explanation

Correct answer: C. (A)-(IV), (B)-(I), (C)-(II), (D)-(III)

Explanation

A half adder adds two bits (A-IV). A decoder has n inputs and 2ⁿ outputs (B-I). A register is a CPU storage unit (C-II). Main memory stores the program at run time (D-III).

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