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UGC NET · PAPER 2

UGC NET Paper 2 Computer Science – Unit 2: Computer System Architecture PYQ (June 2024 Re-Exam)

11 questions · answer key at the end · updated 11 Oct 2026
Q11. Consider the number (45)ᵧ where y is the base of the number. Some of the possible values of y are given below.
(A) 5
(B) 6
(C) 7
(D) 8
Choose the correct answer from the options given below:
  1. (A), (B) and (C) Only
  2. (B), (C) and (D) Only
  3. (A), (C) and (D) Only
  4. (A), (B), (C) and (D)
Answer & explanation →
Q33. Find the correct sequence of the storage devices in descending order based on their access time.
(A) Registers
(B) Magnetic Disk
(C) Magnetic Tapes
(D) Main memory
(E) Optical Disk
Choose the correct answer from the options given below:
  1. (B), (A), (D), (C), (E)
  2. (B), (A), (E), (D), (C)
  3. (C), (B), (A), (E), (D)
  4. (C), (E), (B), (D), (A)
Answer & explanation →
Q37. A CPU has a 5-stage pipeline with stages Fetch (F), Decode (D), Execute (E), Memory (M) and Write-back (W). Each stage takes one clock cycle. Assume there are no pipeline stalls and the pipeline is initially empty. How many clock cycles are required to complete the execution of 10 instructions?
  1. 10
  2. 14
  3. 15
  4. 19
Answer & explanation →
Q38. Match List I (computing systems) with List II (working/output)
List IList II
(A) Half Adder(I) Has n inputs and 2ⁿ outputs
(B) Decoder(II) CPU storage unit
(C) Register(III) Used to store program at runtime
(D) Main memory(IV) 2-bit addition circuit
  1. (A)-(II), (B)-(III), (C)-(IV), (D)-(I)
  2. (A)-(IV), (B)-(II), (C)-(III), (D)-(I)
  3. (A)-(IV), (B)-(I), (C)-(II), (D)-(III)
  4. (A)-(II), (B)-(IV), (C)-(III), (D)-(I)
Answer & explanation →
Q40. Consider the following statements regarding combinational and sequential circuits.
(A) The output of a combinational circuit depends only on the current input.
(B) The output of a combinational circuit depends on both the current input and the previous output.
(C) The output of a sequential circuit depends only on the current input.
(D) The output of a sequential circuit depends on both the current input and the previous output (state).
Choose the correct answer from the options given below:
  1. (A) and (C) Only
  2. (A) and (D) Only
  3. (B) and (D) Only
  4. (B) and (C) Only
Answer & explanation →
Q46. Arrange the following steps in the proper sequence for simplifying a Boolean function using a Karnaugh map (K-map).
(A) Identify and group the largest possible clusters of 1's
(B) Draw the K-map for the given Boolean function
(C) Write the simplified Boolean expression from the grouped clusters
(D) Transfer the truth table values to the K-map
Choose the correct answer from the options given below:
  1. (B), (D), (A), (C)
  2. (D), (B), (A), (C)
  3. (B), (A), (D), (C)
  4. (A), (B), (C), (D)
Answer & explanation →
Q53. Match List I (Counter) with List II (uses/working)
List IList II
(A) N-bit Ring Counter(I) Uses universal clock
(B) Synchronous Counter(II) Counts exactly N states
(C) Asynchronous Counter(III) Counts 0 to 9
(D) Decimal Counter(IV) Main clock is applied to the first flip-flop only
  1. (A)-(II), (B)-(IV), (C)-(I), (D)-(III)
  2. (A)-(IV), (B)-(II), (C)-(III), (D)-(I)
  3. (A)-(II), (B)-(I), (C)-(IV), (D)-(III)
  4. (A)-(IV), (B)-(I), (C)-(II), (D)-(III)
Answer & explanation →
Q82. Consider the following statements regarding special-purpose registers.
(A) The Program Counter (PC) keeps track of the next instruction to be executed.
(B) The Instruction Register holds the address of the first instruction to be executed.
(C) The Accumulator holds the output of the ALU.
(D) The Program Counter (PC) keeps track of only the first instruction of the program.
Choose the correct answer from the options given below:
  1. (A) and (C) Only
  2. (A) and (D) Only
  3. (B) and (D) Only
  4. (A), (B) and (C) Only
Answer & explanation →
Q84. A multiprocessor system with 16 processors is used to execute a parallelizable task. The serial portion of the task takes 200 clock cycles and the parallel portion takes 800 clock cycles. When all 16 processors are used, how many total clock cycles are required to complete the task?
  1. 250
  2. 300
  3. 400
  4. 450
Answer & explanation →
Q85. Arrange the given steps required for a Direct Memory Access (DMA) transfer in the correct order.
(A) Initiate DMA transfer request
(B) Transfer data directly between peripheral and memory
(C) Processor grants DMA control over the system bus
(D) DMA controller completes data transfer and signals completion
Choose the correct answer from the options given below:
  1. (C), (A), (B), (D)
  2. (A), (C), (B), (D)
  3. (A), (B), (C), (D)
  4. (C), (B), (A), (D)
Answer & explanation →
Q88. A vector processor with 16 lanes can perform an operation on 1024 elements, with each operation taking 5 clock cycles (pipelined). How many cycles are needed to complete the operation?
  1. 64
  2. 80
  3. 100
  4. 128
Answer & explanation →

Answer key

  1. 11 – B
  2. 33 – D
  3. 37 – B
  4. 38 – C
  5. 40 – B
  6. 46 – A
  7. 53 – C
  8. 82 – A
  9. 84 – A
  10. 85 – B
  11. 88 – A