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Unit 2 · Computer System Architecture Paper 2 CS · June 2024 (Re-Exam)

Match List - I with List - II.

Figure

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Correct answer: C. (A)-(IV), (B)-(I), (C)-(II), (D)-(III)

Explanation

A half adder adds two bits; a decoder has n inputs and 2ⁿ outputs; a register is a CPU storage unit; main memory stores the program at run time.

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