A 4-stage pipeline has stage delays of 150, 120, 160 and 140 ns. The registers between stages have a delay of 5 ns. Assuming a constant clocking rate, the total time required to process 1000 data items on this pipeline is

1. A160.5 ms
2. B165.5 ms
3. C120.5 ms
4. D590.5 ms

Pick an option to check yourself, or open the answer below.

Show answer & explanation

Correct answer: B. 165.5 ms

Explanation

Clock period = slowest stage + latch delay = 160 + 5 = 165 ns. Time for 1000 items = (4 + 999) × 165 ns ≈ 165.5 μs.

Note: The computed time is 165.5 μs; the options say ms.