Computer System Architecture – Previous Year Questions
224 questions from past UGC NET Paper 2 – Computer Science papers, each with the correct answer. Open any question for its explanation.
- The write operation in I/O operation does the following-
- Which of the following gates do not give output 1 when both the inputs are 0 - A. NAND gate B. NOR gate C. X-OR gate D. X-NOR gate
- Which of the following statements are true ? A. In the write-through policy, only the cache is updated B. In the write-back policy, both cache and main memory are updated C. Cache coherence problems exist in multiproces…
- The right sequence of suboperations that are performed in arithmetic pipeline is- A. Align the mantissas B. Add or subtract the mantissas C. Normalize the result D. Compare the exponents Choose the correct answer from t…
- Correct the order of instruction cycle: A. Read the effective address B. Fetch the information C. Execute the instruction D. Decode the instruction
- Match List I with List II. List I: A. (100110011)₂, B. Complements, C. Parity bits, D. Variable-length instruction. List II: I. Error detection code; II. CISC; III. Negative number; IV. (133)₁₆.
- Which of the following are not data manipulation instructions? A. Call B. Load C. And D. Increment E. Shift
- Which of the following do not represent memory-reference instructions? A. mode = 1, opcode = 010 B. mode = 0, opcode = 111 C. mode = 1, opcode = 111 D. mode = 1, opcode = 110 E. mode = 1, opcode = 001
- Consider the number (45)ᵧ, where y is the base. Some possible values of y are: (A) 5 (B) 6 (C) 7 (D) 8
- Find the correct sequence of the storage devices in descending order based on their access time. (A) Registers (B) Magnetic Disk (C) Magnetic Tapes (D) Main memory (E) Optical Disk
- Match List - I with List - II.
- Consider the following statements regarding combinational and sequential circuits. (A) Output of combinational circuits depends on the only current input. (B) Output of combinational circuit depends on the both current…
- Match List - I with List - II.
- Arrange the given steps required for a Direct Memory Access (DMA) transfer in the correct order. (A) Initiate DMA transfer request (B) Transfer data directly between peripheral and memory (C) Processor grants DMA contro…
- The instruction LD ADR (X) which is equivalent to ← AC M[ADR+XR] is in :
- Match the List-I and List-II
- For making a memory of size 2048 x 8 bytes, by using the chips of size 128 x 4 bytes, the number of chips required is :
- Which of the following are sequential circuits? A. Flip flop B. Multiplexer C. Counter D. Decoder E. Adder
- Techniques for performing I/O : A. Programmed I/O B. Interrupt-driven I/O C. Rotational I/O D. Direct memory access E. Channelized I/O
- The interface(s) that provide(s) I/0 transfer of data directly to and from the memory unit peripheral is/are termed as: (A) DMA (Direct Memory Access) (B) IOP (Input-Output Processor) (C) Serial Interface (D) Parallel I…
- Which of the following(s) are main memory? (A) Virtual memory (B) Cache memory (C) RAM (D) SSD
- Match List - I with List - II. List - I List - II (a) SZA (I) Increment M and skip it zero (b) SKI (II) Skip if AC is negative (c) SNA (III) Skip if input flag is on (d) ISZ (IV) Skip if AC is Zero
- In most general case, the computer needs to process each instruction with the following sequence of steps: (A) Calculate the effective address (B) Execute the instruction (C) Fetch the instruction from memory (D) Fetch…
- What is the 4+4 bit binary fixed-point equivalent of −(3.72)₁₀?
- Let ⊕ denote XOR, and 1 and 0 the binary constants. F(P, Q) = ((1 ⊕ P) ⊕ (P ⊕ Q)) ⊕ ((P ⊕ Q) ⊕ (Q ⊕ 0)). Which of the following is equivalent to F?
- A processor chip is used for application in which 30 % of execution time is spent on floating point addition. For the new model of the processor, the design team has come up with redesign the floating point adder to mak…
- 256 Mb DRAM is organized as a 16 K × 16 K memory externally and as a square array internally. Each row must be refreshed at least once every 50 mili second to forestall loss of data; refreshing one row takes 100 nanosec…
- In 16-bit 2's Complementation representation, the decimal number 28 is
- Simplify using a K-map: F(A, B, C, D) = Σ(3, 4, 5, 6, 7, 11, 15)
- Consider a 3-bit counter designed using T flip-flops as shown (Tp = R, Tq = P′, Tr = Q′, all clocked together). If the initial state PQR is 000, what are the next three states?