Computer System Architecture – Previous Year Questions
224 questions from past UGC NET Paper 2 – Computer Science papers, each with the correct answer. Open any question for its explanation.
- Which of the following statements with respect to multiprocessor system are true? (A) Multiprocessor system is controlled by one operating system. (B) In Multiprocessor system, multiple computers are connected by the me…
- Match List I with List II. List I: A. Handshaking, B. Programmed I/O, C. Interrupt-initiated I/O, D. I/O processor. List II: I. I/O interface informs the CPU that the device is ready for transfer, II. Requires two contr…
- Arrange the following types of machine in descending order of complexity. (A) SISD (B) MIMD (C) SIMD Choose the correct answer from the options given below:
- Given below are two statements: Statement I : Hardwired control unit can be optimized to produce fast mode of operation. Statement II : Indirect addressing mode needs two memory reference to fetch the operand. In the li…
- The Boolean expression AB′ + AB + A′C + AC is unaffected by the value of the Boolean variable
- A non-pipelined system takes 30 ns to process a task. The same task can be processed in a four- segment pipeline with a clock cycle of 10 ns . Determine the speed up of the pipeline for 100 tasks.
- A computer uses a memory unit of 512 K words of 32 bits each. A binary instruction code is stored in one word of the memory. The instruction has four parts: an addressing mode field to specify one of the two-addresssing…
- A micro instruction format has microoperation field which is divided into 2 subfields F1 and F2, each having 15 distinct microoperations, condition field CD for four status bits, branch field B R having four options use…
- If (142)_b + (112)_(b−2) = (75)_8, find the base b.
- The following program is stored in the basic computer: 010 CLA; 011 ADD 016; 012 BUN 014; 013 HLT; 014 AND 017; 015 BUN 013; 016 C1A5; 017 93C6. Give the accumulator contents (hex) after execution.
- The Reduced Instruction Set Computer (RISC) characteristics are : (a) Single cycle instruction execution (b) Variable length instruction formats (c) Instructions that manipulates operands in memory (d) Efficient instruc…
- Which of the following binary codes for decimal digits are self complementing? (a) 8421 code (b) 2421 code (c) excess-3 code (d) excess-3 gray code Choose the correct option :
- An instruction at location 500 has its address field at 501, holding the value 400. Register R1 contains 200. Match each addressing mode with its effective address: (a) Direct, (b) Register indirect, (c) Indexed with R1…
- Match List I with List II. List I: (a) Isolated I/O, (b) Memory-mapped I/O, (c) I/O interface, (d) Asynchronous data transfer. List II: (i) Same set of control signals for I/O and memory communication, (ii) Separate ins…
- Match List I with List II. List I: (a) Micro-operation, (b) Microprogrammed control unit, (c) Interrupts, (d) Microinstruction. List II: (i) Specify micro-operations, (ii) Improve CPU utilization, (iii) Control memory,…
- Which type of addressing mode, less number of memory references are required?
- Suppose that the register and the register have the bit configuration. Only the three A leftmost bits of are compared with memory K words because has l's in these positions. Because of its organization, this type of mem…
- The fault can be easily diagnosed in the micro- program control unit using diagnostic tools by maintaining the contents of
- What will be the number of states when a MOD- 2 counter is followed by a MOD- 5 counter?
- The parallel bus arbitration technique uses an external priority encoder and a decoder. Suppose, a parallel arbiter has 5 bus arbiters. What will be the size of the priority encoder and decoder respectively?
- Consider (146)_b + (313)_(b−2) = (246)_8. What is b?
- How many address lines and data lines are required to provide a memory capacity of 16 K × 16 ?
- Suppose that a computer program takes 100 seconds of execution time on a computer with multiplication operation responsible for 80 seconds of this time. How much do you have to improve the speed of multiplication operat…
- A processor can support a maximum memory of (4 GB) where memory is word addressable and a word is 2 bytes. What will be the size of the address bus of the processor?
- The Boolean expression Ā·B + A·B̄ + A·B is equivalent to
- In computers, subtraction is generally carried out by
- Consider the following Boolean equations: (i) wx + w(x + y) + x(x + y) = x + wy (ii) (w x̄ (y + x z̄) + w̄ x̄) y = x̄ y What can you say about the above equations?
- Consider the following statements : (i) Auto increment addressing mode is useful in creating self-relocating code. (ii) If auto increment addressing mode is included in an instruction set architecture, then an additiona…
- A computer uses a memory unit with 256K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code, a register code part to speci…
- Consider the following x86 assembly language instructions: MOV AL, 153 NEG AL The contents of the destination register AL (in 8-bit binary), the status of the Carry Flag (CF) and the Sign Flag (SF) after executing these…