Consider an unpipelined machine with 10 ns clock cycles which uses four cycles for ALU operations and branches, and five cycles for memory operations. The relative frequencies of these operations are 40%, 20% and 40% respectively. Due to clock skew and setup, the pipelined machine adds 1 ns overhead to the clock. How much speedup is observed in the instruction execution rate when a pipelined machine is considered?

1. A2 times
2. B4 times
3. C6 times
4. D8 times

Pick an option to check yourself, or open the answer below.